Epiphany-V Taped Out
Epiphany V Tape Out PageEpiphany-V: A 1024 processor 64-bit RISC System-On-Chip PDFLooks like it does 2 32-bit d = a * b + c floating point operations, or 4096 flops/clock. If they hit 1 GHz they would...
View ArticleForth Hardware Thoughts
James Bowman's FPGA based J1 : Site | PDF | Presentation | Forth Source Chuck Moore : Arithmetic | Instruction Set | Ether Forth | Problem Oriented LanguageGA144GreenArrays144 cores9216 18-bit words of...
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Technical Evaluation of Traditional vs New "HDR" Encoding Crossed With...
Conclusion first. There is no technical justification for using the new HDR signal standards for HDR. Classic 8-bit/channel or 10-bit/channel Gamma 2.2 output is more than adequate for the full...
View ArticlePossible Directional Routing Hoplite Variant?
Thinking about minimal grid based routing. Two things I don't like about the Hoplite, (1.) Full chip return paths.(2.) Route length not proportional to 2D locality. Like the simplified router and...
View ArticleAtomic Scatter-Only Gather-Free Machines
GPUs are build around having texture caches, and caches are build around collecting loads for the most part, because loads have the highest memory traffic typically. So if after stripping out the...
View ArticleOctober Misc Demotubes
Super Medium by Still - Deadline (Berlin) 2016Reflex - Mathematica | C64 demo, Full HD 50 fps, Real SIDVirgill / Alcatraz - Rhodium 4k introAmong The Stars - LJ & Triace | 4k | Deadline 2016Gaspode...
View ArticleInstruction Fetch Optimization
Been reading the Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics to better understand requirements for higher clock FPGA design. Seems as if the only point in using BRAM output register...
View ArticleNotes from Attempting to Understand FPGA Timing Limits
I'm using the table I built below as a quick reference to think though timing while working on design. Reference from last time, Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics. Working...
View ArticleDSP and Rounding Notes
Posting a few more notes while in the background I continue to work towards the next design try.===================== DSP FUNCTIONALITY=====================Some of the Xilinx 7 series DSP functionality...
View ArticleVariation on Branching Design - Return Only
Thoughts related to Instruction Fetch Optimization, a post which talked about only auto-incrementing the lower 8-bits of the program counter, having even-only branch addresses to remove an ADDer...
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Why Motion Blur Trivially Breaks Tone-Mapping - Part 2
Continuing from last post...The question remains how to "fix it"? Any "fix" requires that the post-tone-mapped image is physically energy conserving under motion blur. As in energy conserving from the...
View ArticleSimplified Vulkan Rapid Prototyping
Nothing simple about using Vulkan, so this title is a little misleading ...Trying something new for my next Vulkan based at-home prototyping effort and building from scratch for 64-bit machines only....
View ArticleLast Blogger Post
Blog is actively slowly migrating to a Git Wiki,https://github.com/TimothyLottes/TimothyLottesWiki/wiki
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