Another MIMD machine of tiny processors connected by an on-chip network,
Former NASA Exec Brings Stealth Machine Learning Chip to Light
{"We wanted to have the processing in immediate vicinity of the memory—a push model. You don’t need the cache, you don’t need to do fetch. We didn’t design this just for processing, we balanced communications and processing in memory to keep balance. It’s a communicator—there’s a router right in the middle of it," Goldin explains. Unfortunately, the reason they signed a contract for the first chip, which came out in 2015, is because of that eDRAM feature, which put each of the tDSPs right adjacent to memory for immediate contact. While the next variant of their chip won’t be able to use it, they have found a suitable workaround, although they were not able to provide details as of yet.}
If the first diagram is accurate,
Cluster: 8 DSPs sharing 2 MB of eMEM (guessing eDRAM?) + 256 KB sMEM (static RAMs for program binaries?).
Super Cluster: 8 clusters connected with a full 8x8 crossbar.
Chip: 4 super clusters connected with a full 4x4 crossbar.
And from the second diagram,
Chip 4x4 crossbar has 16 bidirectional ports at 10 Gbit/sec per port.
Former NASA Exec Brings Stealth Machine Learning Chip to Light
{"We wanted to have the processing in immediate vicinity of the memory—a push model. You don’t need the cache, you don’t need to do fetch. We didn’t design this just for processing, we balanced communications and processing in memory to keep balance. It’s a communicator—there’s a router right in the middle of it," Goldin explains. Unfortunately, the reason they signed a contract for the first chip, which came out in 2015, is because of that eDRAM feature, which put each of the tDSPs right adjacent to memory for immediate contact. While the next variant of their chip won’t be able to use it, they have found a suitable workaround, although they were not able to provide details as of yet.}
If the first diagram is accurate,
Cluster: 8 DSPs sharing 2 MB of eMEM (guessing eDRAM?) + 256 KB sMEM (static RAMs for program binaries?).
Super Cluster: 8 clusters connected with a full 8x8 crossbar.
Chip: 4 super clusters connected with a full 4x4 crossbar.
And from the second diagram,
Chip 4x4 crossbar has 16 bidirectional ports at 10 Gbit/sec per port.